🎓 G.C.E. A/L ICT Exam Solutions (Part II)
Hardware, Networks, Operating Systems & Step-by-Step Calculations
Principal Inventor of ENIAC
Theory: ENIAC was the world's first general-purpose electronic digital computer, designed by John Presper Eckert and John W. Mauchly.
ENIAC → Eckert & Mauchly
Stored Program → Von Neumann
Analytical Engine → Charles Babbage
First Programmer → Ada Lovelace
Third Generation Computers
Theory: 1st Gen = Vacuum Tubes, 2nd Gen = Transistors, 3rd Gen = Integrated Circuits (IC), 4th Gen = VLSI/Microprocessors, 5th Gen = AI.
Non-Volatile Memory
Theory: Non-volatile memory retains data when power is off. RAM, Cache, and Registers are volatile. Flash and ROM are non-volatile.
Outside the Microprocessor
Theory: ALU, Control Unit, Registers, and Cache are inside the microprocessor. RAM, Hard Disks, and SSDs are outside (external memory).
NOT a typical use of RAM
Theory: RAM is temporary and volatile, used for running programs and temporary data. The BIOS program is permanent and must be stored in non-volatile ROM.
ABC Company Network Design
Theory: 4 Departments (D01-D04) each need a Switch. All switches connect to a central Router. The Router connects to a Firewall, which connects to the Internet. Proxy and DNS servers sit in the ICT Services (D04) department.
Internet
│
+-------------+
| Firewall |
+-------------+
│
+-------------+
| Router |
+-------------+
┌────────────┼─────────────┬─────────────┐
+---------+ +---------+ +---------+ +---------+
| Switch | | Switch | | Switch | | Switch |
+---------+ +---------+ +---------+ +---------+
│ │ │ │
Accounts Sales Admin ICT Services
(D01) (D02) (D03) (D04)
│
┌────────────────────┴───────────────┐
+---------------+ +---------------+
| Proxy Server | | DNS Server |
+---------------+ +---------------+
Differences Between TCP and UDP
| Feature | TCP | UDP |
|---|---|---|
| Reliability | Reliable (checks delivery) | Unreliable (no checks) |
| Connection | Connection-oriented | Connectionless |
| Speed | Slower (error checking) | Faster (no overhead) |
| Examples | HTTP, Email, FTP | Video Streaming, VoIP, DNS |
TCP = Trustworthy (Reliable, slower)
UDP = Ultra Fast (Unreliable, faster)
Page Number & Offset Bits
Given: 16-bit Virtual Address, Page Size = 4 KB.
Step 1 (Offset): 4 KB = 4096 Bytes = 2¹². Therefore, Offset = 12 bits.
Step 2 (Page Number): 16 total bits - 12 offset bits = 4 bits.
+------------+----------------+
| Page Number| Offset |
| 4 bits | 12 bits |
+------------+----------------+
Physical Address Calculation
Given: Virtual Address = 12500.
Step 1: Page Number = 12500 ÷ 4096 = 3 (Remainder/Offset = 212).
Step 2: Page Table shows Page 3 is in Frame 6 (110₂).
Step 3: Physical Address = (Frame × Page Size) + Offset = (6 × 4096) + 212 = 24788.
Paging Concepts
- Why a page is absent: 1) Not loaded into RAM yet. 2) Swapped out to disk due to full RAM.
- Advantages of Paging: Eliminates external fragmentation; supports virtual memory (running programs larger than physical RAM).
- Hardware for mapping: Memory Management Unit (MMU) inside the CPU.
First Block of promax.py
Theory: Trace the chain backwards. The first block is the one not pointed to by any other block.
Chain: 503 → 501 → 500 → 502 → -1 (End).
Disk Space Occupied
Theory: The file uses 4 blocks (503, 501, 500, 502). Each block is 4 KB.
Calculation: 4 blocks × 4 KB = 16 KB.
File Grows to 20 KB
Theory: Needs 1 more block (20 KB - 16 KB = 4 KB). The free block is 504.
Action: Change block 502's pointer from -1 to 504. Change block 504's pointer to -1.
Block Next Block
500 502
501 500
502 504 ← Updated
503 501
504 -1 ← Updated (End)
Quick Answer Key
| Q | Answer | Topic |
|---|---|---|
| 1 | 5 | ENIAC (Eckert & Mauchly) |
| 2 | 3 | 3rd Gen = Integrated Circuits |
| 3 | 4 | Non-Volatile = Flash & ROM |
| 4 | 2 | RAM is outside Microprocessor |
| 5 | 5 | BIOS is stored in ROM, not RAM |
| 2v | Diagram | Router → Firewall → Internet |
| 2vi | Table | TCP (Reliable/Slow) vs UDP (Fast) |
| 3a | 4 & 12 | Page Number & Offset bits |
| 3bi | 24788 | Physical Address Calculation |
| 3biv | MMU | Hardware for address mapping |
| 3ci | 503 | First FAT Block |
| 3cii | 16 KB | File Size (4 blocks × 4KB) |
🖥️ Computer Generations & Logic Gates (Half/Full Adder)
🧮 Number Systems & Binary Arithmetic
🌐 IP Addressing, CIDR, VLSM, and Network Devices
🧠 Operating Systems: Process States, Virtual Memory, Paging, FAT
🛠️ SDLC, Software Testing, and Feasibility Studies
❓ Frequently Asked Questions (FAQ)
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